/*
 * Copyright (C) Hisilicon Technologies Co., Ltd. 2012-2019. All rights reserved.
 * Description: Function of glux1605b_sensor_ctl.c
 * Author: ISP SW
 * Create: 2012/06/28
 */

 #include <stdio.h>
 #include <sys/types.h>
 #include <sys/stat.h>
 #include <sys/ioctl.h>
 #include <fcntl.h>
 #include <unistd.h>
 
 #include "hi_comm_video.h"
 #include "hi_sns_ctrl.h"
 #include  "glux1605b_cmos.h"
 #ifdef __HuaweiLite__
 #include "asm/io.h"
 #endif
 
 #ifdef HI_GPIO_I2C
 #include "gpioi2c_ex.h"
 #else
 #include "hi_i2c.h"
 #endif
 #define himm(address, value)        writel(value, address)
 #define himd(address, pvalue) \
	 do {                            \
		 *(pvalue) = readl(address); \
	 } while (0)
 
 static void delay_ms(int ms)
 {
	 usleep(ms * 1000);	/* 1ms: 1000us */
 }
 
 static inline HI_VOID writereg(HI_U32 value, HI_U32 mask, HI_U32 addr)
 {
	 HI_U32 t;
	 himd(addr, &t);
	 t &= ~mask;
	 t |= value & mask;
	 himm(addr, t);
 }
 
 typedef struct {
   unsigned char len;
   unsigned char *send_buffer;
   unsigned char *recv_buffer;
 } GPIO_SPI_BUFFER_S;
 
 typedef struct {
   unsigned short addr;
   GPIO_SPI_BUFFER_S data;
 } GPIO_SPI_DATA_S;
 
 #define GPIO_SPI_READ_BIT     _IOWR('r', 3, GPIO_SPI_DATA_S)
 #define GPIO_SPI_WRITE_BIT    _IOWR('w', 4, GPIO_SPI_DATA_S)
 
 // 定义SPI相关的GPIO引脚号  
 #define GPIO_SPI_CLK    34 // 时钟引脚号       CLK   		SPI0_SCLK/GPIO4_2/I2C0_SCL-[SPI_3LINE_SCLK
 #define GPIO_SPI_MOSI   36 // 主机输出引脚号   SDO			SPI0_SDI/GPIO4_4/I2C1_SDA-[SENSOR_VS]
 #define GPIO_SPI_MISO   35 // 主机输入引脚号   SDI			SPI0_SDO/GPIO4_3/I2C0_SDA-[SPI_3LINE_SDATA]
 #define GPIO_SPI_CS     37 // 片选引脚号       CSN			SPI0_CSN/GPIO4_5/I2C1_SCL-[SPI_3LINE_CSN/SENSOR_HS]
 
 static int g_fd[ISP_MAX_PIPE_NUM] = {[0 ...(ISP_MAX_PIPE_NUM - 1)] = -1};
 
 
 void glux1605b_reset(void)
 {
 
	 /**GPIO4_1*/
	 HI_U32 u32SetValue = 0x1 << 1;
	 HI_U32 mask = 0x1 << 1;
 
	 /**Set GPIO4_1 direction*/
	 writereg(u32SetValue, mask, 0x120D4400);
 
	 himm(0x120d4008,0x2);
	 usleep(10 * 1000);
	 himm(0x120d4008,0x0);
	 usleep(10 * 1000);
	 himm(0x120d4008,0x2);
 
	 printf("\033[1;34m<%s-%d> GPIO4_1\n", __func__, __LINE__);
 }
 void glux1605b_power(void)
 {
 
	 /**GPIO8_1*/
	 HI_U32 u32SetValue = 0x1 << 1;
	 HI_U32 mask = 0x1 << 1;
 
	 /**Set GPIO8_1 direction*/
	 writereg(u32SetValue, mask, 0x120D8400);
 
	 himm(0x120d8008,0x2);
 
 
	 
	 printf("\033[1;34m<%s-%d> GPIO8_1\n", __func__, __LINE__);
 
 
 }
 /* 设置GPIO方向 */
 static  void hi_gpio_set_direction(void)
 {
	 /**SPI0_SCLK/GPIO4_2/*/
	 HI_U32 u32SetValue_2 = 0x1 << 2;
	 HI_U32 mask_2 = 0x1 << 2;
 
	 /**Set GPIO4_2 direction*/
	 writereg(u32SetValue_2, mask_2, 0x120D4400);
	 
	 /**SPI0_SDO/GPIO4_3/*/
	 HI_U32 u32SetValue_3 = 0x1 << 3;
	 HI_U32 mask_3 = 0x1 << 3;
 
	 /**Set GPIO4_3 direction*/
	 writereg(u32SetValue_3, mask_3, 0x120D4400);
	 
	 /**SPI0_SDI/GPIO4_4/*/
	 HI_U32 u32SetValue_4 = 0x0 << 4;
	 HI_U32 mask_4 = 0x0 << 4;
 
	 /**Set GPIO4_4 direction*/
	 writereg(u32SetValue_4, mask_4, 0x120D4400);
	 
	 /**SPI0_CSN/GPIO4_5/*/
	 HI_U32 u32SetValue_5 = 0x1 << 5;
	 HI_U32 mask_5 = 0x1 << 5;
 
	 /**Set GPIO4_5 direction*/
	 writereg(u32SetValue_5, mask_5, 0x120D4400);
 
 }
 /* 设置GPIO值 */
 static  void hi_gpio_set_void(unsigned short uigpio,unsigned short value)
 {
	 switch (uigpio)
		 {
		 case GPIO_SPI_CLK:		///**SPI0_SCLK/GPIO4_2/*/
			 //printf("GPIO_SPI_CLK\n");
			 if(value == 1)
			 {
				 himm(0x120d4010,0x4);
			 }else{
				 himm(0x120d4010,0x0);
			 }
			 break;
		 case GPIO_SPI_CS:		///**SPI0_CSN/GPIO4_5/*/
			 //printf("GPIO_SPI_CS\n");
			 if(value == 1)
			 {
				 himm(0x120d4080,0x20);
			 }else{
				 himm(0x120d4080,0x0);
			 }
			 break;
		 case  GPIO_SPI_MOSI:		///**SPI0_SDO/GPIO4_3/*/
			 //printf("GPIO_SPI_MISO\n");
			 if(value == 1)
			 {
				 himm(0x120d4020,0x8);
			 }else{
				 himm(0x120d4020,0x0);
			 }
			
			 break;
		 case GPIO_SPI_MISO:		///**SPI0_SDI/GPIO4_4/*/
			 //printf("GPIO_SPI_MOSI \n");
			 if(value == 1)
			 {
				 himm(0x120d4040,0x10);
			 }else{
				 himm(0x120d4040,0x0);
			 }
			 break;
		 default:
			 printf("Unknown error !!!!!\n");
			 break;
		 }
	 
	 
 }
 static  HI_U8 hi_gpio_get_void(unsigned short uigpio)
 {
	 HI_U8 value;
	 
	 switch (uigpio)
		 {
 
		 case  GPIO_SPI_MOSI:		///**SPI0_SDO/GPIO4_3/*/
			 //printf("GPIO_SPI_MISO\n");
			 himd(0x120d4020, &value);
 
			
			 break;
		 case GPIO_SPI_MISO:		///**SPI0_SDI/GPIO4_4/*/
			 //printf("GPIO_SPI_MOSI \n");
			 himd(0x120d4040, &value);
 
			 break;
		 default:
			 printf("Unknown error !!!!!\n");
			 break;
		 }
	 
	 return value;
 }
 
 static void glux1605b_SPI_Delay(void)  
 {  
	 // usleep(25);//delay_ms(1);//usleep(25);//(20); // 调整延时时间以匹配25MHz SPI时钟频率，可根据实际情况微调  
	 asm volatile(
		 "nop;"
	 );
 }
 
 //写入固定字节数据		
 static void glux1605b_SPI_WriteByte(unsigned short data_num, unsigned short data)
 {
	 int i;
	 for (i = 0; i < data_num; i++)
	 {
		 hi_gpio_set_void(GPIO_SPI_CLK, 0);
		 if (data & (1 << (data_num - 1)))  
			 hi_gpio_set_void(GPIO_SPI_MOSI, 1);
		 else
			 hi_gpio_set_void(GPIO_SPI_MOSI, 0);
		 glux1605b_SPI_Delay();
		 hi_gpio_set_void(GPIO_SPI_CLK, 1);
		 glux1605b_SPI_Delay();
		 data <<= 1;
	 }
 }
 
 
 // 写入10位地址和8位数据  
 void glux1605b_SPI_WriteData(unsigned short addr, unsigned char data)  
 {  
	 hi_gpio_set_void(GPIO_SPI_CS, 0);  
	 glux1605b_SPI_Delay();  
	 
 
	 // 发送低10位地址  
	 glux1605b_SPI_WriteByte(10, addr & 0x3FF);  
	 // 发送数据  
	 glux1605b_SPI_WriteByte(8, data);  
	 hi_gpio_set_void(GPIO_SPI_CLK, 0);  
 
 
	 glux1605b_SPI_Delay();  
	 hi_gpio_set_void(GPIO_SPI_CS, 1);  
 }  
 
 
 
 // 读取一个字节  
 static unsigned char glux1605b_SPI_ReadByte(void)  
 {  
	 unsigned char i;  
	 unsigned char data = 0;  
 
	 for(i = 0; i < 8; i++)  
	 {  
		 hi_gpio_set_void(GPIO_SPI_CLK, 0);  
		 glux1605b_SPI_Delay();  
		 data <<= 1;  
		 if(hi_gpio_get_void(GPIO_SPI_MISO))  
			 data |= 0x01;  
		 hi_gpio_set_void(GPIO_SPI_CLK, 1);  
		 glux1605b_SPI_Delay();  
	 }  
	 return data;  
 }
 
 
 
 
 // 读取指定地址的数据  
 unsigned char glux1605b_SPI_ReadData(unsigned short addr)  
 {  
	 unsigned char data;  
	 
	 hi_gpio_set_void(GPIO_SPI_CS, 0);  
	 glux1605b_SPI_Delay();  
	 
	 // 发送低10位地址  
	 glux1605b_SPI_WriteByte(10, addr & 0x3FF);  
	 // 读取数据  
	 data = glux1605b_SPI_ReadByte();  
	 
	 glux1605b_SPI_Delay();  
	 hi_gpio_set_void(GPIO_SPI_CS, 1);  
	 
	 return data;  
 }  
 HI_U8 glux1605b_read_register(VI_PIPE vi_pipe, HI_U16 addr) 
 {
 
   HI_U8 reg_value = 0;
   
 
   //spi.addr = (td_u16)(addr & 0x1ff);
 
   reg_value = glux1605b_SPI_ReadData(addr & 0x1ff);
 
   return reg_value;
 }
 
 HI_U32 glux1605b_write_register(VI_PIPE vi_pipe, HI_U16 addr, HI_U8 data) 
 {
 
 
   //spi.addr = (HI_U16)((addr | 0x200) & 0x3ff);
   glux1605b_SPI_WriteData((addr | 0x200) & 0x3ff,data);
 
   return HI_SUCCESS;
 }
 
 
 
 
 
 
 void glux1605b_prog(VI_PIPE vi_pipe, const HI_U32 *rom)
 {
	 return;
 
 }
 
 void glux1605b_standby(VI_PIPE vi_pipe)
 {
 
	 return;
 }
 
 void glux1605b_restart(VI_PIPE vi_pipe)
 {
 
	 return;
 }
 
 #define GLUX1605B_SENSOR_1080P_30FPS_LINEAR_MODE  1
 #define GLUX1605B_SENSOR_1080P_30FPS_2t1_WDR_MODE 2
 
 void glux1605b_wdr_1080p30_2to1_init(VI_PIPE vi_pipe);
 void glux1605b_linear_1080p30_init(VI_PIPE vi_pipe);
 
 void glux1605b_default_reg_init(VI_PIPE vi_pipe)
 {
	 HI_U32 i;
	 HI_S32 ret = HI_SUCCESS;
	 ISP_SNS_STATE_S *pastglux1605b = HI_NULL;
	 pastglux1605b = glux1605b_get_ctx(vi_pipe);
	 for (i = 0; i < pastglux1605b->astRegsInfo[0].u32RegNum; i++) {
		 ret += glux1605b_write_register(vi_pipe,
									  pastglux1605b->astRegsInfo[0].astI2cData[i].u32RegAddr,
									  pastglux1605b->astRegsInfo[0].astI2cData[i].u32Data);
	 }
	 if (ret != HI_SUCCESS) {
	 }
 }
 
 void glux1605b_init(VI_PIPE vi_pipe)
 {
	 WDR_MODE_E       enWDRMode;
	 HI_BOOL          bInit;
	 HI_U8            u8ImgMode;
	 HI_S32 ret;
	 ISP_SNS_STATE_S *pastglux1605b = HI_NULL;
	 pastglux1605b = glux1605b_get_ctx(vi_pipe);
	 bInit       = pastglux1605b->bInit;
	 enWDRMode   = pastglux1605b->enWDRMode;
	 u8ImgMode   = pastglux1605b->u8ImgMode;
	 #if 0
	 ret = glux1605b_i2c_init(vi_pipe);
	 if (ret != HI_SUCCESS) {
	 }
	 #endif
	 hi_gpio_set_direction();
	 glux1605b_power();
	 glux1605b_reset();
 
	 /* When sensor first init, config all registers */
	 if (bInit == HI_FALSE) {
		 if (WDR_MODE_2To1_LINE == enWDRMode) {
			 if (u8ImgMode == GLUX1605B_SENSOR_1080P_30FPS_2t1_WDR_MODE) {  /* GLUX1605B_SENSOR_1080P_30FPS_2t1_WDR_MODE */
				 glux1605b_wdr_1080p30_2to1_init(vi_pipe);
			 } else {
			 }
		 } else {
			 glux1605b_linear_1080p30_init(vi_pipe);
		 }
	 } else {
		 /* When sensor switch mode(linear<->WDR or resolution), config different registers(if possible) */
		 if (WDR_MODE_2To1_LINE == enWDRMode) {
			 if (u8ImgMode == GLUX1605B_SENSOR_1080P_30FPS_2t1_WDR_MODE) {  /* GLUX1605B_SENSOR_1080P_30FPS_2t1_WDR_MODE */
				 glux1605b_wdr_1080p30_2to1_init(vi_pipe);
			 } else {
			 }
		 } else {
			 glux1605b_linear_1080p30_init(vi_pipe);
		 }
	 }
 
	 pastglux1605b->bInit = HI_TRUE;
	 return;
 }
 
 void glux1605b_exit(VI_PIPE vi_pipe)
 {
	 return;
 }
 
 void glux1605b_linear_1080p30_init_write_register(VI_PIPE vi_pipe)
 {
	 HI_S32 ret = HI_SUCCESS;
	 ret +=  glux1605b_write_register(vi_pipe, 0x3000, 0x01);    // Standby mode
	 ret +=  glux1605b_write_register(vi_pipe, 0x3002, 0x01);    // Master mode stop
 
	 // Mode register setting
	 ret +=  glux1605b_write_register(vi_pipe, 0x3005, 0x01);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3007, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3009, 0x02);    // 60fps;0x00->120fps
	 ret +=  glux1605b_write_register(vi_pipe, 0x300c, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3010, 0x21);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3011, 0x0a);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3014, 0x00);    // gain
	 ret +=  glux1605b_write_register(vi_pipe, 0x3018, 0x65);    // VMAX
	 ret +=  glux1605b_write_register(vi_pipe, 0x3019, 0x04);
	 ret +=  glux1605b_write_register(vi_pipe, 0x301c, 0x30);    // HMAX;
	 ret +=  glux1605b_write_register(vi_pipe, 0x301d, 0x11);    // HMAX;
	 ret +=  glux1605b_write_register(vi_pipe, 0x3020, 0x01);    // SHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3021, 0x00);    // SHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3022, 0x00);    // SHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3030, 0x0B);    // RHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3031, 0x00);    // RHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3032, 0x00);    // RHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3024, 0x00);    // SHS2
	 ret +=  glux1605b_write_register(vi_pipe, 0x3025, 0x00);    // SHS2
	 ret +=  glux1605b_write_register(vi_pipe, 0x3026, 0x00);    // SHS2
	 ret +=  glux1605b_write_register(vi_pipe, 0x3045, 0x01);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3046, 0x01);    // MIPI
	 ret +=  glux1605b_write_register(vi_pipe, 0x305c, 0x18);    // 37.125MHz INCK Setting
	 ret +=  glux1605b_write_register(vi_pipe, 0x305d, 0x03);
	 ret +=  glux1605b_write_register(vi_pipe, 0x305e, 0x20);
	 ret +=  glux1605b_write_register(vi_pipe, 0x305f, 0x01);
	 ret +=  glux1605b_write_register(vi_pipe, 0x309e, 0x4a);
	 ret +=  glux1605b_write_register(vi_pipe, 0x309f, 0x4a);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3106, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x311c, 0x0e);
 }
 /* 1080P30 and 1080P25 */
 void glux1605b_linear_1080p30_init(VI_PIPE vi_pipe)
 {
	 // Enter Standby
	   printf("<%s,%d>\n", __func__, __LINE__);
	 //glux1605b_write_register(vi_pipe, 0x000, 0x0	);
	 //glux1605b_write_register(vi_pipe, 0x001, 0x30 );
		 #if 1
 
	   // 0~40
	   glux1605b_write_register(vi_pipe, 0x000, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x001, 0x30 );
	   
	 //   glux1605b_write_register(vi_pipe, 0x002, 0x8	); 
	   
	   glux1605b_write_register(vi_pipe, 0x002, 0x9	);   //test image
 
	   glux1605b_write_register(vi_pipe, 0x003, 0xFF );
	   glux1605b_write_register(vi_pipe, 0x004, 0x7	);

	   //VMAX = 1000
	//    glux1605b_write_register(vi_pipe, 0x005, 0xE8 );
	//    glux1605b_write_register(vi_pipe, 0x006, 0x3	);
	//    glux1605b_write_register(vi_pipe, 0x007, 0x0	);
	//    glux1605b_write_register(vi_pipe, 0x008, 0x0	);
	   //VMAX = 1270
	   glux1605b_write_register(vi_pipe, 0x005, 0xF6 );
	   glux1605b_write_register(vi_pipe, 0x006, 0x4	);
	   glux1605b_write_register(vi_pipe, 0x007, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x008, 0x0	);

	   //HMAX 
	//    glux1605b_write_register(vi_pipe, 0x009, 0xCD );
	//    glux1605b_write_register(vi_pipe, 0x00A, 0x5	);
	    //HMAX = 1170
		glux1605b_write_register(vi_pipe, 0x009, 0x92 );
		glux1605b_write_register(vi_pipe, 0x00A, 0x4  );
 
	 //   glux1605b_write_register(vi_pipe, 0x00B, 0xE6 );  //exp time
	   glux1605b_write_register(vi_pipe, 0x00B, 0xDC );  //exp time
	   glux1605b_write_register(vi_pipe, 0x00C, 0x3	);
 
	   glux1605b_write_register(vi_pipe, 0x00D, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x00E, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x00F, 0x50 );
	   glux1605b_write_register(vi_pipe, 0x010, 0x0	);
 
	   glux1605b_write_register(vi_pipe, 0x011, 0x0	);
	 //   glux1605b_write_register(vi_pipe, 0x011, 0x8	);   //agin
 
	   glux1605b_write_register(vi_pipe, 0x012, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x013, 0x14 );
	   glux1605b_write_register(vi_pipe, 0x014, 0xA	);
	   glux1605b_write_register(vi_pipe, 0x015, 0x5	);
	   glux1605b_write_register(vi_pipe, 0x016, 0x38 );
	   glux1605b_write_register(vi_pipe, 0x017, 0xC8 );
	   glux1605b_write_register(vi_pipe, 0x018, 0x12 );
	   glux1605b_write_register(vi_pipe, 0x019, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x01A, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x01B, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x01C, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x01D, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x01E, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x01F, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x020, 0x0);
	   glux1605b_write_register(vi_pipe, 0x021, 0x0);
	   glux1605b_write_register(vi_pipe, 0x022, 0x0);
	   glux1605b_write_register(vi_pipe, 0x023, 0x0);
	   glux1605b_write_register(vi_pipe, 0x024, 0x0);
	   glux1605b_write_register(vi_pipe, 0x025, 0x0);
	   glux1605b_write_register(vi_pipe, 0x026, 0x0);
	   glux1605b_write_register(vi_pipe, 0x027, 0x0);
	   glux1605b_write_register(vi_pipe, 0x028, 0x00);
	 
	   // 41~80
	   glux1605b_write_register(vi_pipe, 0x029, 0x0);
	   glux1605b_write_register(vi_pipe, 0x02A, 0x0);
	   glux1605b_write_register(vi_pipe, 0x02B, 0x0);
	   glux1605b_write_register(vi_pipe, 0x02C, 0x11 );
	   glux1605b_write_register(vi_pipe, 0x02D, 0xD5 );
	   glux1605b_write_register(vi_pipe, 0x02E, 0xE0 );
	   glux1605b_write_register(vi_pipe, 0x02F, 0x10 );
	   glux1605b_write_register(vi_pipe, 0x030, 0x29 );
	   glux1605b_write_register(vi_pipe, 0x031, 0x96 );
	   glux1605b_write_register(vi_pipe, 0x032, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x033, 0xE4 );
	   glux1605b_write_register(vi_pipe, 0x034, 0x2	);
	   glux1605b_write_register(vi_pipe, 0x035, 0x30 );
	   glux1605b_write_register(vi_pipe, 0x036, 0x28 );
	   glux1605b_write_register(vi_pipe, 0x037, 0xB	);
	   glux1605b_write_register(vi_pipe, 0x038, 0xE0 );
	   glux1605b_write_register(vi_pipe, 0x039, 0x11 );
	   glux1605b_write_register(vi_pipe, 0x03A, 0x14 );
	   glux1605b_write_register(vi_pipe, 0x03B, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x03C, 0x32 );
	   glux1605b_write_register(vi_pipe, 0x03D, 0x5	);
	   glux1605b_write_register(vi_pipe, 0x03E, 0x32 );
	   glux1605b_write_register(vi_pipe, 0x03F, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x040, 0xB0 );
	   glux1605b_write_register(vi_pipe, 0x041, 0x4	);
	   glux1605b_write_register(vi_pipe, 0x042, 0x64 );
	   glux1605b_write_register(vi_pipe, 0x043, 0x0	);
	   glux1605b_write_register(vi_pipe, 0x044, 0xF4 );
	   glux1605b_write_register(vi_pipe, 0x045, 0x1	);
	   glux1605b_write_register(vi_pipe, 0x046, 0xBC );
	   glux1605b_write_register(vi_pipe, 0x047, 0x2	);
	   glux1605b_write_register(vi_pipe, 0x048, 0x34 );
	   glux1605b_write_register(vi_pipe, 0x049, 0x3	);
	   glux1605b_write_register(vi_pipe, 0x04A, 0xFF );
	   glux1605b_write_register(vi_pipe, 0x04B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x04C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x04D, 0xFF);
 
	 //   glux1605b_write_register(vi_pipe, 0x04E, 0xFF);   //agin
	   glux1605b_write_register(vi_pipe, 0x04E, 0x06);   //agin
 
 
	   glux1605b_write_register(vi_pipe, 0x04F, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x050, 0xFF);
	 
	   // 81~120
	   glux1605b_write_register(vi_pipe, 0x051, 0xFF);
	   
	 //   glux1605b_write_register(vi_pipe, 0x052, 0x06);   //agin
	   glux1605b_write_register(vi_pipe, 0x052, 0xFF);   //agin
 
 
	   glux1605b_write_register(vi_pipe, 0x053, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x054, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x055, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x056, 0x46);
	   glux1605b_write_register(vi_pipe, 0x057, 0x4B);
	   glux1605b_write_register(vi_pipe, 0x058, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x059, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x05A, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x05B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x05C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x05D, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x05E, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x05F, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x060, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x061, 0x03);
	   glux1605b_write_register(vi_pipe, 0x062, 0xC0);
	   glux1605b_write_register(vi_pipe, 0x063, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x064, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x065, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x066, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x067, 0x46);
	   glux1605b_write_register(vi_pipe, 0x068, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x069, 0x56);
	   glux1605b_write_register(vi_pipe, 0x06A, 0xBA);
	   glux1605b_write_register(vi_pipe, 0x06B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x06C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x06D, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x06E, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x06F, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x070, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x071, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x072, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x073, 0x02);
	   glux1605b_write_register(vi_pipe, 0x074, 0x16);
	   glux1605b_write_register(vi_pipe, 0x075, 0x01);
	   glux1605b_write_register(vi_pipe, 0x076, 0x31);
	   glux1605b_write_register(vi_pipe, 0x077, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x078, 0xFF);
	 
	   // 121~160
	   glux1605b_write_register(vi_pipe, 0x079, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x07A, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x07B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x07C, 0x02);
	   glux1605b_write_register(vi_pipe, 0x07D, 0x27);
	   glux1605b_write_register(vi_pipe, 0x07E, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x07F, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x080, 0x32);
	   glux1605b_write_register(vi_pipe, 0x081, 0x42);
	   glux1605b_write_register(vi_pipe, 0x082, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x083, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x084, 0x5A);
	   glux1605b_write_register(vi_pipe, 0x085, 0x7F);
	   glux1605b_write_register(vi_pipe, 0x086, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x087, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x088, 0x94);
	   glux1605b_write_register(vi_pipe, 0x089, 0xAC);
	   glux1605b_write_register(vi_pipe, 0x08A, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x08B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x08C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x08D, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x08E, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x08F, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x090, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x091, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x092, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x093, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x094, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x095, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x096, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x097, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x098, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x099, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x09A, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x09B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x09C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x09D, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x09E, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x09F, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A0, 0xFF);
	 
	   // 161~200
	   glux1605b_write_register(vi_pipe, 0x0A1, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A2, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A3, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A4, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A5, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A6, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A7, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A8, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0A9, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0AA, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0AB, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0AC, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0AD, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0AE, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0AF, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B0, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B1, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B2, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B3, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B4, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B5, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B6, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B7, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B8, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0B9, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0BA, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0BB, 0x00);
	   glux1605b_write_register(vi_pipe, 0x0BC, 0x00);
	   glux1605b_write_register(vi_pipe, 0x0BD, 0x00);
	   glux1605b_write_register(vi_pipe, 0x0BE, 0x00);
	   glux1605b_write_register(vi_pipe, 0x0BF, 0x00);
	   glux1605b_write_register(vi_pipe, 0x0C0, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0C1, 0x11);
	   glux1605b_write_register(vi_pipe, 0x0C2, 0x17);
	   glux1605b_write_register(vi_pipe, 0x0C3, 0x05);
	   glux1605b_write_register(vi_pipe, 0x0C4, 0x18);
	   glux1605b_write_register(vi_pipe, 0x0C5, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0C6, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0C7, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0C8, 0xFF);
	 
	   // 201~240
	   glux1605b_write_register(vi_pipe, 0x0C9, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0CA, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0CB, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0CC, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0CD, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0CE, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0CF, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D0, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D1, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D2, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D3, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D4, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D5, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D6, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D7, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D8, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0D9, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0DA, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0DB, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0DC, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0DD, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0DE, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0DF, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0E0, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0E1, 0x01);
	   glux1605b_write_register(vi_pipe, 0x0E2, 0x04);
	   glux1605b_write_register(vi_pipe, 0x0E3, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0E4, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0E5, 0x60);
	   glux1605b_write_register(vi_pipe, 0x0E6, 0x40);
	   glux1605b_write_register(vi_pipe, 0x0E7, 0x06);
	   glux1605b_write_register(vi_pipe, 0x0E8, 0x14);
	   glux1605b_write_register(vi_pipe, 0x0E9, 0x80);
	   glux1605b_write_register(vi_pipe, 0x0EA, 0x01);
	   glux1605b_write_register(vi_pipe, 0x0EB, 0x68);
	   glux1605b_write_register(vi_pipe, 0x0EC, 0x80);
	   glux1605b_write_register(vi_pipe, 0x0ED, 0x08);
	   glux1605b_write_register(vi_pipe, 0x0EE, 0x1E);
	   glux1605b_write_register(vi_pipe, 0x0EF, 0xE0);
	   glux1605b_write_register(vi_pipe, 0x0F0, 0x08);
	 
	   // 241~280
	   glux1605b_write_register(vi_pipe, 0x0F1, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F2, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F3, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F4, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F5, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F6, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F7, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F8, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0F9, 0xE0);
	   glux1605b_write_register(vi_pipe, 0x0FA, 0x01);
	   glux1605b_write_register(vi_pipe, 0x0FB, 0x46);
	   glux1605b_write_register(vi_pipe, 0x0FC, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0FD, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0FE, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x0FF, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x100, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x101, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x102, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x103, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x104, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x105, 0x69);
	   glux1605b_write_register(vi_pipe, 0x106, 0x70);
	   glux1605b_write_register(vi_pipe, 0x107, 0x08);
	   glux1605b_write_register(vi_pipe, 0x108, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x109, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x10A, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x10B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x10C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x10D, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x10E, 0x1F);
	   glux1605b_write_register(vi_pipe, 0x10F, 0xD0);
	   glux1605b_write_register(vi_pipe, 0x110, 0x08);
	   glux1605b_write_register(vi_pipe, 0x111, 0x58);
	   glux1605b_write_register(vi_pipe, 0x112, 0xF2);
	   glux1605b_write_register(vi_pipe, 0x113, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x114, 0x56);
	   glux1605b_write_register(vi_pipe, 0x115, 0xA2);
	   glux1605b_write_register(vi_pipe, 0x116, 0x25);
	   glux1605b_write_register(vi_pipe, 0x117, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x118, 0xFF);
	 
	   // 281~320
	   glux1605b_write_register(vi_pipe, 0x119, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x11A, 0x8B);
	   glux1605b_write_register(vi_pipe, 0x11B, 0xF4);
	   glux1605b_write_register(vi_pipe, 0x11C, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x11D, 0x3E);
	   glux1605b_write_register(vi_pipe, 0x11E, 0x8);
	 //   glux1605b_write_register(vi_pipe, 0x11F, 0x3E);
 
 
	   glux1605b_write_register(vi_pipe, 0x11F, 0x8);
 
 
	   glux1605b_write_register(vi_pipe, 0x120, 0x3);
	   glux1605b_write_register(vi_pipe, 0x121, 0xF);
	   glux1605b_write_register(vi_pipe, 0x122, 0xF);
	   glux1605b_write_register(vi_pipe, 0x123, 0x0);
	   glux1605b_write_register(vi_pipe, 0x124, 0x0);
	   glux1605b_write_register(vi_pipe, 0x125, 0x0);
	   glux1605b_write_register(vi_pipe, 0x126, 0x0);
	   glux1605b_write_register(vi_pipe, 0x127, 0x0);
	   glux1605b_write_register(vi_pipe, 0x128, 0x0);
	   glux1605b_write_register(vi_pipe, 0x129, 0x0);
	   glux1605b_write_register(vi_pipe, 0x12A, 0x0);
	   glux1605b_write_register(vi_pipe, 0x12B, 0x0);
	   glux1605b_write_register(vi_pipe, 0x12C, 0x0);
	   glux1605b_write_register(vi_pipe, 0x12D, 0x0);
	   glux1605b_write_register(vi_pipe, 0x12E, 0x0);
	   glux1605b_write_register(vi_pipe, 0x12F, 0x0);
	   glux1605b_write_register(vi_pipe, 0x130, 0x0);
	   glux1605b_write_register(vi_pipe, 0x131, 0x0);
	   glux1605b_write_register(vi_pipe, 0x132, 0x0);
	   glux1605b_write_register(vi_pipe, 0x133, 0x0);
	   glux1605b_write_register(vi_pipe, 0x134, 0x0);
	   glux1605b_write_register(vi_pipe, 0x135, 0x0);
	   glux1605b_write_register(vi_pipe, 0x136, 0x0);
	   glux1605b_write_register(vi_pipe, 0x137, 0x0);
	   glux1605b_write_register(vi_pipe, 0x138, 0x0);
	   glux1605b_write_register(vi_pipe, 0x139, 0x0);
	   glux1605b_write_register(vi_pipe, 0x13A, 0x0);
	   glux1605b_write_register(vi_pipe, 0x13B, 0x0);
	   glux1605b_write_register(vi_pipe, 0x13C, 0x0);
	   glux1605b_write_register(vi_pipe, 0x13D, 0x0);
	   glux1605b_write_register(vi_pipe, 0x13E, 0x0);
	   glux1605b_write_register(vi_pipe, 0x13F, 0x0);
	   glux1605b_write_register(vi_pipe, 0x140, 0x00);
	 
	   // 321~360
	   glux1605b_write_register(vi_pipe, 0x141, 0x00);
	   glux1605b_write_register(vi_pipe, 0x142, 0x00);
	   glux1605b_write_register(vi_pipe, 0x143, 0x00);
	   glux1605b_write_register(vi_pipe, 0x144, 0x00);
	   glux1605b_write_register(vi_pipe, 0x145, 0x00);
	   glux1605b_write_register(vi_pipe, 0x146, 0x00);
	   glux1605b_write_register(vi_pipe, 0x147, 0x00);
	   glux1605b_write_register(vi_pipe, 0x148, 0x00);
	   glux1605b_write_register(vi_pipe, 0x149, 0x00);
	   glux1605b_write_register(vi_pipe, 0x14A, 0x00);
	   glux1605b_write_register(vi_pipe, 0x14B, 0x00);
	   glux1605b_write_register(vi_pipe, 0x14C, 0x00);
	   glux1605b_write_register(vi_pipe, 0x14D, 0x00);
	   glux1605b_write_register(vi_pipe, 0x14E, 0x00);
	   glux1605b_write_register(vi_pipe, 0x14F, 0x00);
	   glux1605b_write_register(vi_pipe, 0x150, 0x00);
	   glux1605b_write_register(vi_pipe, 0x151, 0x00);
	   glux1605b_write_register(vi_pipe, 0x152, 0x00);
	   glux1605b_write_register(vi_pipe, 0x153, 0x00);
	   glux1605b_write_register(vi_pipe, 0x154, 0x00);
	   glux1605b_write_register(vi_pipe, 0x155, 0x00);
	   glux1605b_write_register(vi_pipe, 0x156, 0x00);
	   glux1605b_write_register(vi_pipe, 0x157, 0x00);
	   glux1605b_write_register(vi_pipe, 0x158, 0x00);
	   glux1605b_write_register(vi_pipe, 0x159, 0x00);
	   glux1605b_write_register(vi_pipe, 0x15A, 0x00);
	   glux1605b_write_register(vi_pipe, 0x15B, 0x00);
	   glux1605b_write_register(vi_pipe, 0x15C, 0x00);
	   glux1605b_write_register(vi_pipe, 0x15D, 0x00);
	   glux1605b_write_register(vi_pipe, 0x15E, 0x00);
	   glux1605b_write_register(vi_pipe, 0x15F, 0x00);
	   glux1605b_write_register(vi_pipe, 0x160, 0x00);
	   glux1605b_write_register(vi_pipe, 0x161, 0x00);
	   glux1605b_write_register(vi_pipe, 0x162, 0x00);
	   glux1605b_write_register(vi_pipe, 0x163, 0x00);
	   glux1605b_write_register(vi_pipe, 0x164, 0x00);
	   glux1605b_write_register(vi_pipe, 0x165, 0x00);
	   glux1605b_write_register(vi_pipe, 0x166, 0x00);
	   glux1605b_write_register(vi_pipe, 0x167, 0x00);
	   glux1605b_write_register(vi_pipe, 0x168, 0x00);
	 
	   // 361~400
	   glux1605b_write_register(vi_pipe, 0x169, 0x00);
	   glux1605b_write_register(vi_pipe, 0x16A, 0x19);
	   glux1605b_write_register(vi_pipe, 0x16B, 0x6C);
	   glux1605b_write_register(vi_pipe, 0x16C, 0x43);
	   glux1605b_write_register(vi_pipe, 0x16D, 0x08);
	   glux1605b_write_register(vi_pipe, 0x16E, 0x3F);
 
	   glux1605b_write_register(vi_pipe, 0x16F, 0x4A); 
	 //   glux1605b_write_register(vi_pipe, 0x16F, 0x4B); // Test Image
 
	   glux1605b_write_register(vi_pipe, 0x170, 0x36);
	   glux1605b_write_register(vi_pipe, 0x171, 0x97);
	   glux1605b_write_register(vi_pipe, 0x172, 0xC3);
	   glux1605b_write_register(vi_pipe, 0x173, 0xDD);
	   glux1605b_write_register(vi_pipe, 0x174, 0x10);
	   glux1605b_write_register(vi_pipe, 0x175, 0x07);
	   glux1605b_write_register(vi_pipe, 0x176, 0x00);
	   glux1605b_write_register(vi_pipe, 0x177, 0xD0);
	   glux1605b_write_register(vi_pipe, 0x178, 0x00);
	   glux1605b_write_register(vi_pipe, 0x179, 0x4D);
	   glux1605b_write_register(vi_pipe, 0x17A, 0x1D);
	   glux1605b_write_register(vi_pipe, 0x17B, 0x1D);
	   glux1605b_write_register(vi_pipe, 0x17C, 0x1D);
	   glux1605b_write_register(vi_pipe, 0x17D, 0x1D);
	   glux1605b_write_register(vi_pipe, 0x17E, 0x05);
	   glux1605b_write_register(vi_pipe, 0x17F, 0x05);
	   glux1605b_write_register(vi_pipe, 0x180, 0x15);
	   glux1605b_write_register(vi_pipe, 0x181, 0x01);
	   glux1605b_write_register(vi_pipe, 0x182, 0x1D);
	   glux1605b_write_register(vi_pipe, 0x183, 0x92);
	   glux1605b_write_register(vi_pipe, 0x184, 0x87);
	   glux1605b_write_register(vi_pipe, 0x185, 0xF5);
	   glux1605b_write_register(vi_pipe, 0x186, 0xB7);
	   glux1605b_write_register(vi_pipe, 0x187, 0x47);
	   glux1605b_write_register(vi_pipe, 0x188, 0x00);
	   glux1605b_write_register(vi_pipe, 0x189, 0x00);
	   glux1605b_write_register(vi_pipe, 0x18A, 0x8D);
	   glux1605b_write_register(vi_pipe, 0x18B, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x18C, 0x03);
	   glux1605b_write_register(vi_pipe, 0x18D, 0x03);
	   glux1605b_write_register(vi_pipe, 0x18E, 0xB9);
	   glux1605b_write_register(vi_pipe, 0x18F, 0x79);
	   glux1605b_write_register(vi_pipe, 0x190, 0xB4);
	 
	   // 401~440
	   glux1605b_write_register(vi_pipe, 0x191, 0x32);
	   glux1605b_write_register(vi_pipe, 0x192, 0x32);
	   glux1605b_write_register(vi_pipe, 0x193, 0x00);
	   glux1605b_write_register(vi_pipe, 0x194, 0x00);
	   glux1605b_write_register(vi_pipe, 0x195, 0x36);
	   glux1605b_write_register(vi_pipe, 0x196, 0x3A);
	   glux1605b_write_register(vi_pipe, 0x197, 0x59);
	   glux1605b_write_register(vi_pipe, 0x198, 0x4F);
	   glux1605b_write_register(vi_pipe, 0x199, 0x56);
	   glux1605b_write_register(vi_pipe, 0x19A, 0x0A);
	   glux1605b_write_register(vi_pipe, 0x19B, 0x43);
	   glux1605b_write_register(vi_pipe, 0x19C, 0x43);
	   glux1605b_write_register(vi_pipe, 0x19D, 0x02);
	   glux1605b_write_register(vi_pipe, 0x19E, 0x00);
	   glux1605b_write_register(vi_pipe, 0x19F, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A0, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A1, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A2, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A3, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A4, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A5, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A6, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A7, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A8, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1A9, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1AA, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1AB, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1AC, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1AD, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1AE, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1AF, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B0, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B1, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B2, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B3, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B4, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B5, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B6, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B7, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1B8, 0x00);
	 
	   // 441~480
	   glux1605b_write_register(vi_pipe, 0x1B9, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1BA, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1BB, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1BC, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1BD, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1BE, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1BF, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1C0, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1C1, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1C2, 0x8F);//0x0F
	   glux1605b_write_register(vi_pipe, 0x1C3, 0x3F);
	   glux1605b_write_register(vi_pipe, 0x1C4, 0x19);
	   glux1605b_write_register(vi_pipe, 0x1C5, 0x03);
	   glux1605b_write_register(vi_pipe, 0x1C6, 0xED);
	   glux1605b_write_register(vi_pipe, 0x1C7, 0x71);
	   glux1605b_write_register(vi_pipe, 0x1C8, 0x62);
	   glux1605b_write_register(vi_pipe, 0x1C9, 0xCF);
	   glux1605b_write_register(vi_pipe, 0x1CA, 0xFF);
	   glux1605b_write_register(vi_pipe, 0x1CB, 0x42);
	   glux1605b_write_register(vi_pipe, 0x1CC, 0x01);
	   glux1605b_write_register(vi_pipe, 0x1CD, 0x01);
	   glux1605b_write_register(vi_pipe, 0x1CE, 0x06);
	   glux1605b_write_register(vi_pipe, 0x1CF, 0x02);
	   glux1605b_write_register(vi_pipe, 0x1D0, 0x0E);
	   glux1605b_write_register(vi_pipe, 0x1D1, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1D2, 0x07);
	   glux1605b_write_register(vi_pipe, 0x1D3, 0x03);
	   glux1605b_write_register(vi_pipe, 0x1D4, 0x39);
	   glux1605b_write_register(vi_pipe, 0x1D5, 0x9F);
	   glux1605b_write_register(vi_pipe, 0x1D6, 0x1A);
	   glux1605b_write_register(vi_pipe, 0x1D7, 0x00);//0x20
	   glux1605b_write_register(vi_pipe, 0x1D8, 0x88);
	   glux1605b_write_register(vi_pipe, 0x1D9, 0x69);
	   glux1605b_write_register(vi_pipe, 0x1DA, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1DB, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1DC, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1DD, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1DE, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1DF, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E0, 0x00);
	 
	   // 481~511
	   glux1605b_write_register(vi_pipe, 0x1E1, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E2, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E3, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E4, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E5, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E6, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E7, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E8, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1E9, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1EA, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1EB, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1EC, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1ED, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1EE, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1EF, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F0, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F1, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F2, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F3, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F4, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F5, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F6, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F7, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F8, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1F9, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1FA, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1FB, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1FC, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1FD, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1FE, 0x00);
	   glux1605b_write_register(vi_pipe, 0x1FF, 0x00);
	 
	   delay_ms(150);
	   glux1605b_write_register(vi_pipe, 0x1D5, 0xBF);
	   delay_ms(150);
	   glux1605b_write_register(vi_pipe, 0x1D7, 0x20);
	   delay_ms(150);
	   glux1605b_write_register(vi_pipe, 0x1D5, 0x9F);
	   delay_ms(150);
	   glux1605b_write_register(vi_pipe, 0x1C2, 0x0F);
	   delay_ms(150);
	   glux1605b_write_register(vi_pipe, 0x000, 0x04);
	 #endif
 /*
	 himm(0x120d8008,0x2);
	 delay_ms(200);  
	 himm(0x120d8008,0x0);
		 delay_ms(200);  
	 himm(0x120d8008,0x2);
		 delay_ms(200);  
	 himm(0x120d8008,0x0);
		 delay_ms(200);  
	 himm(0x120d8008,0x2);
			 delay_ms(200);  
	 himm(0x120d8008,0x0);
		 delay_ms(200);  
	 himm(0x120d8008,0x2);
 */
	 
	 #if 0
	 // 回读
	 {
	   uint16_t i;
	 
	   printf("<%s-%d >glux1605b sensor reg\n", __func__, __LINE__);
	   for (i = 0; i < 0x200; i++) {
		 printf("%02x ", glux1605b_read_register(vi_pipe, i));
		 if ((i + 1) % 16 == 0)
		   printf("\n");
	   }
	   printf("\n\033[0m");
	 }
	 #endif
	 printf("==============================================================\n");
	 printf("===Sony glux1605b sensor 1080P25fps(MIPI) init success!=====\n");
	 printf("==============================================================\n");
	 return;
 }
 
 void glux1605b_wdr_1080p30_2to1_init_write_register0(VI_PIPE vi_pipe)
 {
	 HI_S32 ret = HI_SUCCESS;
 
	 ret +=  glux1605b_write_register(vi_pipe, 0x3000, 0x01); // # standby
	 delay_ms(200); /* delay 200 ms */
	 ret +=  glux1605b_write_register(vi_pipe, 0x3005, 0x00); //  12Bit, 0x00,10Bit;
	 ret +=  glux1605b_write_register(vi_pipe, 0x3007, 0x40); // VREVERSE & HREVERSE & WINMODE
	 ret +=  glux1605b_write_register(vi_pipe, 0x3009, 0x01); // FRSEL&HCG
	 ret +=  glux1605b_write_register(vi_pipe, 0x300A, 0x3C); // BLKLEVEL
	 ret +=  glux1605b_write_register(vi_pipe, 0x300C, 0x11);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3011, 0x0A); //  Change after reset;
	 ret +=  glux1605b_write_register(vi_pipe, 0x3014, 0x02); //  Gain
	 ret +=  glux1605b_write_register(vi_pipe, 0x3018, 0xC4); //  VMAX[7:0]
	 ret +=  glux1605b_write_register(vi_pipe, 0x3019, 0x04); //  VMAX[15:8]
	 ret +=  glux1605b_write_register(vi_pipe, 0x301A, 0x00); //  VMAX[16]
	 ret +=  glux1605b_write_register(vi_pipe, 0x301C, 0xEC); //  HMAX[7:0]      0x14a0->25fps;
	 ret +=  glux1605b_write_register(vi_pipe, 0x301D, 0x07); //  HMAX[15:8]     0x1130->30fps;
	 ret +=  glux1605b_write_register(vi_pipe, 0x3020, 0x02); //  SHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3021, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3022, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3024, 0x53); //  SHS2
	 ret +=  glux1605b_write_register(vi_pipe, 0x3025, 0x04);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3026, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3030, 0xE1); //  RHS1
	 ret +=  glux1605b_write_register(vi_pipe, 0x3031, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3032, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x303A, 0x08);
	 ret +=  glux1605b_write_register(vi_pipe, 0x303C, 0x04); //  WINPV
	 ret +=  glux1605b_write_register(vi_pipe, 0x303D, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x303E, 0x41); //  WINWV
	 ret +=  glux1605b_write_register(vi_pipe, 0x303F, 0x04);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3045, 0x05); //  DOLSCDEN & DOLSYDINFOEN & HINFOEN
	 ret +=  glux1605b_write_register(vi_pipe, 0x3046, 0x00); //  OPORTSE & ODBIT
	 ret +=  glux1605b_write_register(vi_pipe, 0x304B, 0x0A); //  XVSOUTSEL & XHSOUTSEL
	 ret +=  glux1605b_write_register(vi_pipe, 0x305C, 0x18); //  INCKSEL1,1080P,CSI-2,37.125MHz;74.25MHz->0x0C
	 ret +=  glux1605b_write_register(vi_pipe, 0x305D, 0x03); //  INCKSEL2,1080P,CSI-2,37.125MHz;74.25MHz->0x03
	 ret +=  glux1605b_write_register(vi_pipe, 0x305E, 0x20); //  INCKSEL3,1080P,CSI-2,37.125MHz;74.25MHz->0x10
	 ret +=  glux1605b_write_register(vi_pipe, 0x305F, 0x01); //  INCKSEL4,1080P,CSI-2,37.125MHz;74.25MHz->0x01
	 ret +=  glux1605b_write_register(vi_pipe, 0x309E, 0x4A);
	 ret +=  glux1605b_write_register(vi_pipe, 0x309F, 0x4A);
 }
 
 void glux1605b_wdr_1080p30_2to1_init_write_register1(VI_PIPE vi_pipe)
 {
	 HI_S32 ret = HI_SUCCESS;
	 ret +=  glux1605b_write_register(vi_pipe, 0x3106, 0x11);
	 ret +=  glux1605b_write_register(vi_pipe, 0x311C, 0x0E);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3128, 0x04);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3129, 0x1D); //  ADBIT1,12Bit;0x1D->10Bit;
	 ret +=  glux1605b_write_register(vi_pipe, 0x313B, 0x41);
	 ret +=  glux1605b_write_register(vi_pipe, 0x315E, 0x1A); //  INCKSEL5,1080P,CSI-2,37.125MHz;74.25MHz->0x1B
	 ret +=  glux1605b_write_register(vi_pipe, 0x3164, 0x1A); //  INCKSEL6,1080P,CSI-2,37.125MHz;74.25MHz->0x1B
	 ret +=  glux1605b_write_register(vi_pipe, 0x317C, 0x12); //  ADBIT2,12Bit;0x12->10Bit;
	 ret +=  glux1605b_write_register(vi_pipe, 0x31EC, 0x37); //  ADBIT3,12Bit;0x37->10Bit;
 
	 // ##MIPI setting
	 ret +=  glux1605b_write_register(vi_pipe, 0x3405, 0x10); //  REPETITION
	 ret +=  glux1605b_write_register(vi_pipe, 0x3407, 0x03);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3414, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3415, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3418, 0x7A); //  Y_OUT_SIZE
	 ret +=  glux1605b_write_register(vi_pipe, 0x3419, 0x09); //  Y_OUT_SIZE
	 ret +=  glux1605b_write_register(vi_pipe, 0x3441, 0x0A); //  CSI_DT_FMT 10Bit
	 ret +=  glux1605b_write_register(vi_pipe, 0x3442, 0x0A);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3443, 0x03); //  CSI_LANE_MODE MIPI 4CH
	 ret +=  glux1605b_write_register(vi_pipe, 0x3444, 0x20); //  EXTCK_FREQ
	 ret +=  glux1605b_write_register(vi_pipe, 0x3445, 0x25);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3446, 0x57);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3447, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3448, 0x37);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3449, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x344A, 0x1F); //  THSPREPARE
	 ret +=  glux1605b_write_register(vi_pipe, 0x344B, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x344C, 0x1F);
	 ret +=  glux1605b_write_register(vi_pipe, 0x344D, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x344E, 0x1F); //  THSTRAIL
	 ret +=  glux1605b_write_register(vi_pipe, 0x344F, 0x00);
 }
 
 void glux1605b_wdr_1080p30_2to1_init(VI_PIPE vi_pipe)
 {
	 // 10bit
	 HI_S32 ret = HI_SUCCESS;
	 glux1605b_wdr_1080p30_2to1_init_write_register0(vi_pipe);
	 glux1605b_wdr_1080p30_2to1_init_write_register1(vi_pipe);
 
	 ret +=  glux1605b_write_register(vi_pipe, 0x3450, 0x77); //  TCLKZERO
	 ret +=  glux1605b_write_register(vi_pipe, 0x3451, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3452, 0x1F); //  TCLKPREPARE
	 ret +=  glux1605b_write_register(vi_pipe, 0x3453, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3454, 0x17); //  TIPX
	 ret +=  glux1605b_write_register(vi_pipe, 0x3455, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3472, 0xA0); //  X_OUT_SIZE
	 ret +=  glux1605b_write_register(vi_pipe, 0x3473, 0x07);
	 ret +=  glux1605b_write_register(vi_pipe, 0x347B, 0x23);
	 ret +=  glux1605b_write_register(vi_pipe, 0x3480, 0x49); //  INCKSEL7,1080P,CSI-2,37.125MHz;74.25MHz->0x92
 
	 glux1605b_default_reg_init(vi_pipe);
 
	 delay_ms(200); /* delay 200 ms */
	 ret +=  glux1605b_write_register(vi_pipe, 0x3000, 0x00); // # Standby Cancel
	 ret +=  glux1605b_write_register(vi_pipe, 0x3002, 0x00);
	 ret +=  glux1605b_write_register(vi_pipe, 0x304b, 0x0a);
 
	 printf("=========================================================================\n");
	 printf("===Glux1605b sensor 1080P30fps 10bit 2to1 WDR(60fps->30fps) init success!===\n");
	 printf("=========================================================================\n");
 
	 return;
 }
 